![]() In addition, the Virtuoso System Design Platform provides an automated bidirectional interface with the Cadence SiP-level implementation environment and Sigrity™ PowerSI® 3DEM Extraction Option. Leveraging the Virtuoso Schematic Editor and the Virtuoso Analog Design Environment, it provides a single platform for IC-and package/system-level design capture, analysis, and verification. The Cadence Virtuoso System Design Platform links two world-class Cadence technologies-custom IC design and package/PCB design/analysis-creating a holistic methodology that automates and streamlines the design and verification flow for multi-die heterogeneous systems. Ideal for designs that integrate multiple heterogeneous ICs, including RF, analog, and digital devices Enables engineers to design concurrently across chip, package, and board, saving time and minimizing errors ![]()
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